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PI: Ahmed Busnaina
Authors: Prashanth Makaram and Ahmed Busnaina
Presenters: Prashanth Makaram
Primary Contact: Prashanth Makaram
Primary Contact’s E-mail: pmakaram@coe.neu.edu
Primary Contact’s Phone: 617-373-3201

Selective and Nonselective Removal of Nano and Microscale Contaminants

Presence of particulate contamination in semiconductor processing causes shorts, voids and open circuits thus adversely affecting device performance, reliability and yield. With the shrinking device sizes the size of particles that causes device failure is also decreasing. The International Semiconductor Roadmap (ITRS) projects a critical defect size of 25nm at 65nm technology node by 2009. Thus removal of nano-scaled particles will play a key role in next generation semiconductor devices. In a 0.18um CMOS technology 80 out of the 400 processing steps are contaminant removal processes. Traditionally wet cleaning has been adopted successfully for the removal of sub-micron and micron sized particles from semiconductor substrates. Here two of the cleaning techniques: Single wafer megasonic cleaning and brush scrubber have been evaluated. The brush cleaning is shown to be capable of completely removing down to 80nm Si3N4 particles from silicon wafers. The megasonic cleaning is capable of completely removing particles down to 63nm from both bare silicon wafer and multilayered wafers. In addition, initial tests for advanced Nanomanufacturing applications have also been discussed. Here selective removal of particles from Carbon Nanotube (CNT) films that are used in electronic devices are demonstrated. The results show that the selective removal does not remove the nanotubes while removing the contaminant particles.